Self-checking Fibonacci unit The hardware realization of the Fibonacci unit is based on the principle of For example at the fulfillment of the micro-operation of the "convolution" over the code combination 011 (the "cause") we get the new code combination 100 (the "effect"), which is the necessary condition for the fulfillment of the micro-operation of the "devolution". This means that the correct fulfillment of the "convolution" brings into the condition for the fulfillment of the "devolution". Analogously the correct fulfillment of the "devolution" brings into the condition of the "convolution". It follows from this consideration that the micro-operations of the "convolution" and the "devolution" are mutually checking! Let us consider other "basic micro-operations" since this point of view. As result of the correct fulfillment of the micro-operation of the "replacement" is the combination . The combinations and are erroneous for the "replacement". The micro-operation of the "absorption" is correct if we get as the result the code combination . The code combinations and are erroneous for the "absorption". For the "register interpretation" the establishment of correspondence between the "cause" and the "effect" is realized by using the "check flip-flop". The "cause" sets up the corresponding "check flip-flop" in the state of 1 but the correct fulfillment of the micro-operation (the "effect" fits to the "cause") overthrows the "check flip-flop" in the state of 0. If the "effect" douse not fit to the "cause" (the micro-operation is fulfilled incorrectly) then the "check flip-flop" stays in the state of 1 and this fact is the error indication. The check of the information "writing" to the register is fulfilled by means of the comparison of the register output information after the "writing" with the register input information. If we analyze the "causes" and the "effects" for every basic micro-operation we conclude that every "effect" is the inversion of its "cause", that is, all micro-operations could be reduced to the inversion of the digits (flip-flops) involved to the micro-operations. The block diagram of the Fibonacci unit for realization of the principle of "cause-effect" is shown in Fig. 1. The unit in Fig.1 consists of the information and check registers, which are connected by means of the logical "cause" and "effect" circuits. The logical "cause" circuit analyzes the code information entering the information register through the "Input".
Letēs suppose that we need to fulfill the micro operation of the Hence, if we have the "zero"-code combination in the check register after termination of all the micro operations it means that all the "causes" correspond to their "effects", i.e. all the micro operations are performed correctly. If the check register contains at least the only binary 1 in some flip-flop this means that at least the only basic micro operation is not correct. The binary 1's in the flip-flops of the check register cause the error signal at the output of "Error" of the unit in Fig. 1. The most important advantage of the check principle of "cause - effect", which is realized in Fibonacci unit in Fig. 1, is the detection of errors in the moment of their appearance. The correction of the error in the micro-operation is realized by repetition of this micro-operation. Hence, The above-considered principle of "cause - effect" was put in the basis of the self-checking Fibonacci unit, which was realized by using LSI. The unit fulfilled the following micro-operations: writing, reading, convolution, devolution, replacement, absorption, Fibonacci addition, Fibonacci subtraction, reducing to the minimal form, cyclic shift, conjunction, disjunction, addition by module 2. The availability of the check output of "Error" is the important advantage of the Fibonacci unit. If at the check output the binary signal 1 ("Error") is formed all the informational outputs of the unit are blocked. To correct the "Error" it is necessary to repeat the preceding micro-operation. If there arises the binary signal of 0 at the output of "Error" this means that the "Error" was the result of the "random failure" and blocking the informational outputs stops. If at the repetition of the micro-operation the binary signal of 1 appears again at the output of "Error" this means that the "error" is result of the "constant failure" in the unit and blocking the informational outputs remains. This Fibonacci unit can be used for the design of the fault-tolerant processors by using the doubling two self-checking Fibonacci units. Thus we have completed the consideration of the rather interesting computer project of the Fibonacci processor for the noise-tolerant computations. There arises a question: where such Fibonacci processors can be used? At the present time computer science has entered to the period of active applications of modern cryptosystems. Many cryptosystems are based on computations in very large finite fields. The hardware realization of such computational units or processors requires thousands of logic gates. It is very difficult and costly to develop these kinds of processors, which always yield error free results. It means that the problem of development of processors for the reliable computations is a very important problem of the design of the reliable cryptosystems. What should you do if this project seems to be interested for you? The first step is to contact us! And we are ready to collaborate with you in the practical realization of the noise-tolerant Fibonacci processor! This idea has a future! And we hope on collaboration with you! But there exists a number of other interesting applications of the Fibonacci and "Golden" codes. If you are the specialist in the measurement field you can be interested in the "golden" analog-to-digit and digit to-analog converters and other Fibonacci devices. You can get a more detail information about the noise-tolerant Fibonacci processor and different Fibonacci devices if you can read the articles published in the brochure "Noise-Tolerant Codes: Fibonacci Computer" (1989). |